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CV no: 101
Qualifications: B.Sc. Electronics Courses on Micro's., magnetic recording,
software, nuclear hardening etc.
Languages: English, Dutch, some German, Italian, Japanese.
Computer Experience: Fortran 77 HP Basic "C" C++ Assembler 386 DEC ISM2000
DASH Spice Orcad Xact VAX IBMPC Kyle C for Intel 8051 UNIX MS-DOS X25 (HDLC protocol)
AT&T ISM2000 Xilinx FPGA VHDL Verilog. CADSTAR, MATLAB, MATROX imaging software
COURSES: 1. Heat management course.
2.Nuclear Hardening course held at the Military Academy Shrivenham.3. Structured software,
quality and design organised. by design services. 4. A two-term course of evening classes
held at Southampton College of Technology on Processor systems.5. A five-day intensive
course on magnetic recording organised.
Experience
July 2000- September 2000 Sensor Systems
I designed and developed a LED control circuit and
power supply for a night–sight/viewer. The LED control circuit formed a “screen
saver” enhancing the life of the viewer. Most of the functionality of the screen
saver was implemented in a QUICKLOGIC FPGA. Designing a test interface for a Focal Plane
Array detector and carrying out tests on the detector as part of an ESA funded project.
The detector is, effectively, a CCD frame transfer type with detectable wavelengths
extending from far infra red to ultra violet. Testing involves the use of the MATROX
imaging software – BASIC scripts. Some of the analysis was carried out using MATLAB
routines.
December 1999 - June 2000 Sensor Systems.
Design of a RS422 link and integrating existing units
into an “interface box”. Most of the new electronics apart from the RS422 link
formed part of several resolver–servo control loops.
The existing electronics formed part of the fire and safety switching system. The RS422 link and most of the logic was implemented in
a QUICKLOGIC FPGA.
June 1998 - October 1999;
Design and development of the electrical system on
board the PROBA satellite. I was initially responsible for the EMC specification and the
grounding and bonding specifications. I was responsible for the initial design of the
electrical harness. Involved in the detailed design of an interface between the data
handling system, the power conditioning unit and the units making up the AOCS (Attitude
& Orbit Control System) on board the satellite. This involved the design of a power
distribution system.
October 1997 - May 1998;
I was involved in two space projects. One was the Fluid
Science Laboratory Experiment (FLUIDPAC) ; I was involved in the setting up of the EMC
tests for this project, the other was TEPAD. TEPAD is a test system for use on payloads
going on the spaces station. For TEPAD I did the initial design for the hardware going in
a power supply emulator. This involved sourcing test equipment and the design of some
power electronics for generating interfering signals in the frequency range 30Hz to 30MHz
February 1996 - September 1997.
I have been involved in the design, software as well as
hardware design, for the interface between an infra-red detector and a video system. I was
responsible for the design of part of the hardware for conversion of the signals output
from the sensor into signals suitable for input to a video processing chip and for that
part of the design interfacing with an 80C51 µcontoller. The design was implemented in an
FPGA. I was responsible for setting up the design of the embedded software and for testing
some of the modules in the design. I also finished of the analogue interface to the
sensor.
August 1994 - January 1996.
I have been responsible for the electronics in a
spectrometer for use on a satellite (Envisat). Detailed analysis and part of the design of
an electro-optic system, specification of HI-REL parts and the specification and
performance of tests - including EMC tests. For most of the tests I have been overseeing
the design of test programmes. The design of these programmes was object oriented and they
were written in C++. I was responsible for the detailed design and specification of an
ASIC forming part of a communication link. During this time I have been responsible for
supervising two and sometimes three engineers.
October 1992 - August 1994.
During this period I was engaged in a private
development involving electrochemistry. The work involved some detailed design of
electrodes, electrochemical circuits and power electronics.
September 1992 - October 1992. Professional Audio.
Design of circuit board to fit into an IBM PC. The
functions of the board were: 1. To interface between the PC, a telephone line, a PABX and
a paging system. 2. To provide a digital speech record and replay facility. The schematics
for the PCB were complete. Two parts of the board: the digital speech record and replay
and the telephone line interface, had been designed, built and tested.
May 1992 - July 1992. Consumer Electronics.
Design of circuitry to equalise off-tape PR4 type
signal for use with direct video recording on 1/4" tape cassettes. Investigation into
various types of PLL's for recovering clock from an equalised PR4 type signal. The derived
clock was to be used in a Viterbi type decoder.
April 1989 - April
1992.
1. May 1990 to May 1992: Design and development of
155Mbit clock recovery and generation board for use in an ISM (Intelligent Synchronous
Multiplexer) for use in an SDH system.
2. April 1989 - April 1990: Completion of the
development of an LF fault detection and location system. This formed part of a 2Mbit data
communications system for use on telephone lines.
Experience continues…….
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THE
TWINSERVE GROUP